Logically, after our last DRAM pricing update (10/23/25), where DDR4 DRAM pricing broke above the trendline, we expected weekly  price increases to moderate a bit, especially as overall CE demand was weakening.  We were wrong again as DDR4 prices continued to rise, with the weekly average rising 16.1% during the last week in October.  On a single model basis (DDR4 16Gb 2Gx8 3200 MT/s) the highest capacity DRAM (DDR4) that we track rose over 22% in that week and reached a staggering 695.7% price gain for the YTD, which we believe is the highest price on record for that DRAM model, while the average of all 6 DDR4 models we track is up 438.9% YTD.
Rather than speculate on whether the rally runs out of steam before the end of the year we focus more on how CE companies will deal with these massive price increases and whether they will get passed on to consumers next year or whether CE companies will eat the increase and deal with additional margin compression.  We expect the effect will be relatively small this year, perhaps reducing discounts a bit during the holidays, but at some point the effects of AI data center growth will force CE brands to pass on some of those increases to consumers in 2026.

[1] In September we noted that glass substrates for semiconductor packaging was not only showing signs of moving forward, but were seeing a more practical view of the technology, as opposed to a more R&D approach that had been the case in previous years, as AI drives High Performance Computing.  We highlighted Absolics (pvt), a spin of off Korea’s SKC (011790.KS), (Applied Materials (AMAT) also owns ~30%) who seems to be among the first to offer commercial glass substrate product for advanced semiconductor packaging.
Critical Capacity-Adoption Challenge for Glass Substrates
While Absolics is small compared to major glass producers they have been particularly focused on glass substrates for semis and already have a 12,000 m2 production facility and has been planning its expansion to 72,000 m2 with a 60,000 m2 addition.  At an  expected  cost of almost $350 million over the next two years, with ~$140 million in 2026 alone, the company and parent are a bit concerned that this might be a bit more capacity than the market can currently bear. 
The Capacity-Adoption "Chicken and Egg" for Advanced Packaging
On the positive side, Absolics is expected to have passed qualification procedures for AMD (AMD), while some believe (unconfirmed) that Amazon (AMZN) Web Services has postponed glass substrate qualification until there is enough capacity to justify adoption. So we wind up in a chicken and egg situation where SKC and Absolics are concerned about expanding capacity before the market develops and potential customers are concerned about adopting the technology before there is enough capacity to support commercialization..  SKC has also been considering moving its copper foil business, another capital intensive project that is vying for SKC’s capex in 2026 and 2027 and as SKC recently found itself with a new CEO, the question as to where Absolics sits in the new regime remains open.
Competition in the Glass Substrate Market: Why SKC Must Act Now
That said, even at 12,000 m2/year Absolics is the leader in the space and seems to be further along on qualification than others, including larger glass suppliers, most of whom we believe are working on small (1,000/2,000 m2/yr. lines).  While SKC might be cautious about expanding capacity before the market takes off, we expect such a view would be considered short-sighted a few years down the road.  Glass substrates for semiconductor packaging does face some challenges, but it is expected to be the impetus for another round of semiconductor growth at it allows for higher component density in packaging and can also be used to relieve density issues for high-end PCBs.  As Absolics is being challenged by large glass producers like Corning (GLW), AGC (5201.JP), Schott (pvt), Hoya (7741.JP) and NEG (5214.JP), they need to strike while the iron is hot.


[1] Mandalorian Image Source: https://starwars.fandom.com/wiki/Cryo-furnace
 

What do PCBs and glass have in common?  PCBs have glass fiber in them, but the commonality stops there, at least for now.  In this note we take a quick look at the use of glass as a core ingredient in future PCBs and as a key material for advanced semiconductor packing in the future.  The unique characteristics of glass allow it to solve a number of current and future issues with semiconductors and board level products that suddenly have become high priority issues as AI creates demand for servers and high-speed silicon devices at a rapid pace.  Before going further it is important to understand the basics about PCBs.
What is a PCB?

PCBs (Printed Circuit Boards) are typically made of FR-4[1], a widely used laminate consisting of a glass fiber reinforced epoxy, and copper foil, layered with an adhesive.  They can be single or multi-layer (up to over 30 layers).  FR-4 is inexpensive, has been standardized since the 1960’s and provides a rigid and stable framework for components, along with the ability to provide a structure for intricate traces (the equivalent of wires on a PCB) for component connections and power sources in most environments.  However as the number of layers and components increases so does crosstalk (the bleed of a signal from one part of the board to another) as does the amount of heat generated, and that heat reduces the life of board components.
While PCBs have been used for many years, the demands of modern servers, especially high powered GPUs used for AI training and inference have pushed the limits of this medium and research is being done on using glass as a substrate for a number of reasons.

• As board density increases, trace line widths decrease, making the lithography that produces these lines more difficult.  While PCB boards are rigid to a degree they have inherent flexibility and not necessarily perfectly flat and when it comes to lithography, even a small change in any direction, such as a slight bend in the substrate, can cause a defect that can lead to later issues or an outright board rejection.  Glass is over 1,000 times flatter than a typical FR-4 PCB.
• Thermal Expansion (CTE) occurs as the temperature rises in a material.  Glass has a CTE that is similar to that of silicon, which means it expands and contracts at roughly the same rate[2], while standard PCB CTE is 2 to 3 times higher, meaning it can expand and contract at a greater rate than the components.  This mismatched expansion can lead to solder joint fatigue or more serious warpage issues.
• In typical server operation, both the copper traces and the FR-4 absorb some of the signal.  As boards get larger that loss increases.  It also increases as the frequency of the signal increases, which becomes a significant factor with HBM (High Bandwidth Memory and High speed GPUs. Dielectric loss for glass is half to ¼ that of FR-4, and specialty glasses can reduce that loss by another order of magnitude.

 
Unfortunately, there are drawbacks with using glass as a PCB substrate or in advanced semiconductor packaging.  While FR-4 has been used for over 50 years and is well ingrained in the electronics production ecosystem, glass is a new material for these uses and has some unique manufacturing challenges.

• Glass is brittle and fragile and can be damaged during handling and processing, lowering yield and requiring more expensive handling equipment.
• Vias, copper clad tunnels that connect layers and vent heat, are more difficult to produce than with FR-4.  Lasers or ion etch is used to create vias in glass substrates, a slower and certainly more expensive process than the drilling used with FR-4 PCBs.
• The cost of substrate quality glass is considerably higher than FR-4 and the number of suppliers is extremely limited currently.
• The thermal characteristics of glass are such that it is a poor heat conductor, and as such, thermal management, already an issue with high-speed servers, becomes more so.

When Intel (INTC) first announced that it intended to develop and use glass substrates (9/2023) the timeline for commercialization was ‘in the second half of the decade’ or at least before 2030, and many expressed the opinion that it would take longer, if ever.  Since then the rapid expansion of AI and its concomitant need for greater server capacity and performance, have attracted a number of others to the glass substrate fold and the ecosystem needed to move this concept to commercialization continues to build.  We see four major categories for the glass substrate ecosystem:

• Specialty Glass Manufacturers
• Equipment Suppliers
• Fabricators
• Assembly & Test

 
Specialty Glass Manufacturers

This category is divided into two segments.  Those large commercial glass producers that are developing specialty glass for substrates and advanced semiconductor packaging, and those suppliers who are singly focused on this particular application.  While the most noise will come from the first category, it will take years for glass substrates to become meaningful in light of the other income streams these manufacturers have.  That is not to say it won’t become meaningful, only that it will take years to grow the application and the ecosystem.  Smaller suppliers, particularly Absolics, have been laying the groundwork for the industry, along with Intel.

Large Commercial Suppliers:
All of the companies listed under ‘large commercial suppliers’ are currently producing specialty glass products for advanced semiconductor packing R&D.  Most are at the qualification level as full scale packaging using glass substrates is just beginning to materialize.
Corning (GLW)
AGC (5201.JP)
Schott (pvt)
Hoya (7741.JP)
Nippon Electric Glass (5214.JP)

Small Focused Suppliers
These companies are more focused on the substrate glass market without the distraction of much larger other businesses and have a better chance to come up with specific solutions, as long as they are amply funded.
Absolics (011790.KS)
Plan Optik (P40.XE)
JNTC (204270.KS)

Equipment Suppliers
These companies are modifying existing tools and developing new ones that allow both glass producers and fabricators to utilize glass substrates.  As the technology is changing rapidly, there is no standardization on new tools at this time
LPKF Laser AG (LPK.XE)
Canon (7751.JP)
Yield Engineering Systems (pvt)
Applied Materials (AMAT)

Fabricators
These companies take th raw materials and create glass substrates to specification.  This is custom work and will likely remain so for the near future, which leaves open the expansion of the list to include a much larger base.
Samsung Electro-Mechanics (009150.KS)
Intel

Assembly & Test
Component placement (assembly) will be shared between fabricators and outsourced assemblers, while we expect test (other than at the line level) to be entirely outsourced to guarantee independence and impartiality.
ASE Group (ASX)
Amkor Technology (AMKR)
Powertech technology (6239.TT)
Toray Engineering (3402.JP)
​
A Deeper Look - Absolics
Absolics was created as an affiliate of SKC Ltd (011790.KS) in late 2021, with SKC being one of dozens of recognizable companies in Korea under the SK Group[3] umbrella.  Absolics was created to focus specifically on glass core substrates and to eventually become the world’s first large scale commercial manufacturer of glass core substrates.  By exploiting the characteristics of the company’s specialty glass formulations the company expects to solve many of the issues that limit chip-level progress.  The company has indicated that the use of its materials can provide up to a 50% power reduction and a 30% improvement in signal performance, which are two big issues for server farms.
The company began constructing on a $600m ~10,000 ft2 facility (Phase 1) at SKC’s campus in Covington, GA in November of 2022.  The first phase of the construction was a $240m small volume glass manufacturing facility, followed by a $360m high volume line.  The company received approval for up to $75m[4] in CHIPS Act funding for the phase 2 (120,000 ft2 total) facility in May of last year and up to $100m for R&D from the federal government’s National Advanced Packaging Manufacturing Program.  The government weighed the cost of building a glass substrate manufacturing facility from scratch and the administrative delays associated with such a project and made the investment with a highly experience manufacturer instead.  The company has targeted mass production by the end of this year with phase 1 production of 12,000 m2/year and 72,000 m2/year when phase 2 is completed,
The core of Absolics technology is its TGV (Through Glass Via) technology.  These ‘tunnels’ through the glass substrate provide inter-layer communication and further reduces signal loss by reducing the overall length of the signal path through layer stacking.  As chip production becomes more complex with multi-layer boards and interconnected chiplets the necessity to reduce signal interference and loss through vias and low loss materials becomes essential. This is particularly important in relation to power, which has to be delivered both horizontally across each layer and vertically to all layers and to passive components that can be embedded into the glass substrate itself. 


[1] FR stands for Fire Retardant while the 4 is a designation for the grade of the epoxy-glass laminate.

[2] Silicon ~2.6 ppm/°C; Glass – 3.2 to 7.5 (adjustable)

[3] Sk Telecom – the #1 telecom company in Korea; Sk Hynix the 3rd largest semiconductor company world-wide; SK Silton the only silicon wafer manufacturer in Korea to name a few

[4] NIST indicates that Absolics has been approved for $100m in CHIPS funding, which we believe is for R&D.

The research grant mentioned above is specifically targeted to TGV development in order to reduce the challenges associated with TGVs and to develop the specialized equipment to facilitate their production.  This is also an extension of the company’s collaboration with the DOD under their SHIP Program (State-of-the-Art Heterogeneous Integrated Packaging) which requires ultra-low loss package designs.  The company also benefits from a 12% investment SKC has made in Chipletz (pvt), a fabless substrate start-up in Texas.
The company is positioning itself as a neutral supplier to both major foundries and to design houses that do not want to purchase glass from competitors.  There are others who are developing similar technology and products with internally developed expertise, such as Samsung (005930.KS) and LG Innotek (011070.KS) so it will not be without risk for Absolics, but they have partnered with over 30 suppliers and external resources in order to compete more effectively, and continue to have the backing of SK Group, the 2nd largest manufacturing company in South Korea (Samsung is 1st).   There are still a number of major challenges that need to be reduced or eliminated, particularly low TGV yield and reliance on AI demand, but if glass substrates perform as well as expected in real world use, Absolics will directly benefit.
As Absolics is more focused on chip level and packaging glass substrates than board level products, we compare the parameters of using glass core substrates in advanced packaging against typical ABF and silicon interposers.

As with all new technologies, estimates vary considerably, with estimates for market size ranging from $4.3b to $7.8b in 2024 and $8.3b to $12.3b in 2032, with CAGR ranging from 3.6% to 7.8%.  That said we expect there is little commonality between these estimates as the term ‘Glass Substrates’ is far to general to mean only high purity glass substrates for PCB cores and advanced semiconductor packaging.  Therefore we reserve judgement on market size until we see some substantive numbers out of any of the glass suppliers listed above, although we don’t expect that soon as the technology and the products have to be rigorously tested before being adopted by any of the major foundries and put into production. When that happens others will follow and the market will grow quickly, especially if Ai demand continues to grow.
Glass substrates for PCBs and advanced semiconductor packaging solves a number of problems that put limitations on semiconductor growth.  We expect if the technology lives up to expectations it will become a necessary part of the advanced packaging space and find its way into the high-end of PCB board design.  It might be hard to tell who the winners will be this early in the game, but we will continue to update as the development progresses and mass production begins both at the glass level and at the application level.
​
Sources:
Absolicsinc.com
Eng.sk.som
PCBmake.com
Albanyceo.com
Kedglobal.com
Nist.gov
Yolegroup.com
Circuitinsight.com
Inbusinessphx.xom
Craft.com
Imasource.org
Electronicsforyou.biz
UnityPCB.com
Technews.tw
 

Samsung Electronics (005930.KS) has reportedly notified clients that it is expecting to be raising prices on some DRAM products in 4Q by between 15% and 30%.  Seemingly singled out was mobile DRAM (LPDDR4/5), typically used in smartphones and laptops and NAND flash eMMC, which has similar applications but tends to be used in lower budget products.  We note that the value of LPDDR in a high-end smartphone is relatively small relative to the display, the camera hardware, and the SoC.  We expect such memory represents ~4$ of the BOM for the Apple (AAPL) iPhone 16, or ~$17.  For reference a 15% price hike would increase that to 4.7% and a 30% increase would move it to 5.3% of BOM, with all other costs staying the same, so worst case would be an incremental ~$5.00 to cost, although we see a more likely ~$2.55 increase.  We note this follows price increases from SK Hynix (000660.CH) and Micron (MU).
​

​As we noted yesterday in our note on DRAM pricing, the market for DDR4 remains tight as major memory producers shift production to highly profitable HBM memory to satisfy data center demand.  Our note indicated our expectation that another round of memory price increases was in the offing as we head into the holiday build season, with smaller producers already indicating those increases are to come.  Yesterday, it seems that Micron (MU), one of three major DRAM suppliers, indicated to its distributor and OEM clients that it will suspend price quotes for DRAM and NAND and is refusing to negotiate long-term contracts for 2026.  This came about after Micron executives reviewed customer demand forecasts which indicated to them that the current shortage situation was going to get worse, even after informing customers of a pending 20% to 30% price increase in DRAM components. More specialized memory, particularly automotive components, could see increases above those levels
It seems that while spot prices are just beginning to move upward, the industry is already prepared for round two of DRAM price increases.  Based on the Micron situation and the continued shift away from DDR 4 by major producers, we expect spot memory prices to rise quickly.  At the same time the extreme supply/demand situation makes it more difficult to use the memory market as a proxy for judging whether tariff-related pull-in purchases will affect demand positively or negatively during the pre-holiday build period.  It seems we need to find another test bed.

DRAM prices have been on a tear this year, with spot prices for a basket[1] of DDR 4 DRAM up 177% YTD.  Over the last 4 weeks however the relentless increases have been quelled and that same basket saw a 3.9% price decline.  We note that this is a very small blip on a much large screen, but according to Trendforce the industry is getting ready for another round of price increases as we head into the peak season for the CE space.  Trendforce cites Commercial Times as Taiwanese DRAM producers Winbond (2344.TT) and Nanya (2408.TT) raise prices.
There have been a number of factors that have influenced the rise in DDR 4 prices this year with three underlying drivers.  Driver #1 is AI, and its relentless thirst for HBM (High bandwidth memory).  Given the higher profitability and strong demand for HBM, large DRAM producers have shifted production away from DDR 4 and DDR 5 production, with major producers like Samsung Electronics (005930.KS), SK Hynix (000660.KS), and Micron (MU) expecting to wind down DDR 4 production by the end of this year. 
Driver #2 was tariffs, which caused buyers to pull-in inventory stocking, creating a bit of ‘phantom’ demand that helped to push up prices, along with an intentional production cutback late last year.  This  set the stage for these factors to generate significant positive momentum behind DRAM pricing and pushed up DDR 4 prices so much that they exceeded DDR 5 prices, a very rare inversion,
While the major DRAM producers have to follow the macro trends, smaller producers can capitalize on the continuing price strength in DDR 4 and it seems they are taking full advantage of that strength by keeping capacity tight and raising prices again.  Thus far it has had only a small effect on spot pricing, but as we enter the seasonally strong period for CE products expectations are that DDR 4 prices will rise further.  To us, this is a test.  We are quite curious to see if the tariff pull-ins have a dampening effect on demand for the holiday build period.  If they were truly pull-ins with no incremental demand behind them, it could be difficult to get such price increases to stick.  If there is some real demand, the increases will be effective.  While each product category in the CE space is different, there are a number of other products where a similar scenario is playing out, so any indication of whether  there is real demand behind current prices will help to map out the remainder of the year and 1Q ’26 for the CE space in general.


[1] 16GB 2Gx8 MIT/s; 6GB 2Gx8 eTT; 8GB 1Gx8 3200 MIT/s; 8GB 512Mx16 3200 MIT/s; 8GB 1Gx8 eTT; 4GB 512Mx8 1600 MIT/s
 

​China’s largest foundry Semiconductor Manufacturing International Corporation (688981.CH), aka SMIC, is purchasing the remaining 49% of SMIC North, making it a wholly-owned subsidiary.  SMIC is issuing new shares to the minority owners of SMIC North at 74.20 yuan ($10.42 US), which cannot be less than 80% of the average price over the last 1209 days, according to Chinese regulations.  It seems that aside from other considerations, the minority shareholders, some of whom have been involved with SMIC North since the company was founded in 2013 are looking for an exit.  We believe the largest minority shareholder is the National Integrated Circuit Industry Investment Fund Co., Ltd., known as the "Big Fund", along with at least these four other state entities - Beijing Integrated Circuit Manufacturing and Equipment Equity Investment Center (Limited Partnership), Beijing Yizhuang International Investment Development Co., Ltd., Zhongguancun Development Group Co., Ltd., and Beijing Industrial Development Investment Management Co., Ltd.
SMIC says they are making the purchase to recover profitable assets, as SMIC North’s production lines are fully depreciated and fully utilized, which will now be attributable to SMIC, raising its ‘profile’, and giving it full control over those assets (although we expect it has had full control since inception).  SMIC North is a 12” wafer foundry, which is the direction in which SMIC (overall) is heading so it is an easy sell to say there is a need to consolidate the 12” assets, but again it seems that with 51% ownership previously, they pretty much controlled it all.  This harkens back to the minority shareholders who seem to be the motivating force behind this change.  We are not sure whether it signals a lack of faith in SMIC’s long-term prospects, or if the Big Fund is looking for more unicorn-like investments, but the press release reads like a carefully worded justification for a transaction that was not necessary.  Chinese corporate bullshit is just like American corporate bullshit.
 

​High performance CPUs are the basis for tasks that are too large or too time-consuming for standard processors.  Applications like climate modeling, genomic sequencing, visual effects, and the now essential AI model training, require parallel processing and high performance cores to handle massive datasets and the complex calculations that are required  by these applications.  Serial processing, where single code tasks are operated on one-after another, is the basis for relative simple applications, but as the datasets become larger, it is a slow system, prone to bottlenecks, that is completely reliant on the speed and processing power of the CPUs.  This has led the semiconductor industry to work toward more dense and complex cores, which means progressively smaller features, higher power consumption, and more specialized processors.
In order to sidestep this relentless push toward smaller nodes and more power hungry processors, some application code can be rewritten to allow for parallel processing, where more than one section of code can be executed at the same time, increasing overall processing speed.  That said, not all code can be rewritten for parallel processing. Tasks that can be broken down into smaller ‘sub-problems” are ideal for parallel processing, but those involving data dependency or those that have sequential bottlenecks (a point where execution stops until a single task in the code stream is completed) are very difficult to rewrite, so the push for faster and more powerful processors continues.
Intel (INTC) has come up with a process that uses software to create a ‘super core’, essentially two cores operating as one. With the addition of a small bit of hardware, this allows a single sequential program to operate as  if it were running in parallel, using two cores as if it were one much larger core, without rewriting the code.  The Intel process (software and hardware) allows two cores to operate as a single ‘virtual’ core, accomplished with special synchronization circuitry that allows the cores to ‘speak’ to each other using a special section of high-speed memory that is cordoned off from other functions, but the real magic is in the software stack.
.The source code (the program) is compiled into a single threaded program of binary code by a generic C++ or similar compiler, but instead of running the code at this point, the Intel software runs a JIT (Just-in-time) compiler that analyzes the code and identifies frequently used sections.  It converts them into a format that can be split and run concurrently, along with additional ‘flow control instructions.  As the two cores execute the modified code, the synchronization circuitry follows the flow control instructions, allowing the two cores to work as one.  They fetch and executing the program segments concurrently.
But wait, there’s more…Each core has a BPU (Branch Prediction Unit) to keep track of where potential splits in the program’s instructions occur.  This helps the cores make guesses about where to find the next instruction block to keep both cores active as much as possible and to keep them from both acting on the same data at the same time.  This is important as an incorrect guess means the entire pipeline of instructions must be ‘cleaned’ (emptied) and restarted from the miscalculation point, which is a big performance penalty.  Newer Intel processors have two (Hybrid) instruction prediction systems to reduce such issues.
So, instead of looking toward a smaller CPU node, larger number of cores, or higher power cores, Intel has made some modifications to the cores and the execution stack that make two cores act as one larger and more efficient core.  This allows the SDC to boost single-threaded performance without the inefficiency of building larger, more power-hungry cores.  Since Intel has E-cores (efficiency) that are already small and power efficient, combining them creates a more powerful “supercore”, that rivels Intel’s P-core (performance) but with greater power efficiency.
Of course, much of this information comes from Intel patents, so there are no yardstick for when or if this might find its way into consumer products, but it represents a way for Intel to simplify core architecture from two types (E & P) to a single high performance core type that could replace the need for two and simplify chip design.  Of course, there is no free lunch and we would be remiss if we did not also point to some of the issues that make this seemingly simple process more complex.
In this case the bigger problem is not hardware, it’s software, as both the JIT compiler and the operating system scheduler must be intelligent enough to not only identify code sections for SDC execution but also to manage the complex inter-core synchronization with minimal overhead and latency.  This would require considerable cooperation between Intel and operating system developers (Microsoft (MSFT), Linux, etc.) and a deep understanding of the processor’s architecture by the OS.  The latency (communication between the cores) is particularly critical as if it is greater than the performance gain of running them in parallel, the system would fail to provide any benefit (similar to the Intel Itanium processor).  If Intel is able to work through those difficulties, the benefits of a single core architecture would be substantial and reduce the contant push for smaller CPU production nodes and higher power CPUs.

We are sure there will be many who will say if a US company wants to sell to China the US government should get a cut, and we understand the thinking behind that concept, but we have two questions.  One, is the US government supposed to be in the export licensing business, and two, where will that money go if it is generated and collected?  The 15% “sales tax” placed on Nvidia’s (NVDA) and AMD’s (AMD) China sales should be returned to the US government’s “shareholders”, its taxpayers, at best in the form of a “Special dividend” or in the alternative a direct reduction in the national debt.  If the government is going to act like an investor, it should return profits to its shareholders, rather than into some slush fund that helps to pay for a new White House ballroom or some other special project.  But the real question is are we selling government services to US corporations or are we looking to create jobs, expand the economy, and develop new and innovative products?  Not so sure anymore…

The current White House has decried the US Chips Act as a wasteful and a poor strategy (direct subsidies), although it remains in place, with the obvious desire to “bring back the semiconductor business to the US” through tariffs.  While the US does not dominate the manufacturing of advanced semiconductors, we have a very robust semiconductor ecosystem that is a leader in the development of semiconductor products and semiconductor technology.  Semiconductor Engineering has completed the daunting task of listing 544 US semiconductor institutions in the US semiconductor ecosystem which we have analyzed.
The dataset shows the company/Institution name, the city and state where located, the business type and the activity.  To clarify, there are 9 business types and 6 Activities:
Business Types

• Fabless – 67
• Foundry – 27
• Equipment – 41
• Materials – 58
• IDM (Integrated Device Manufacturer) – 221
• OSAT (Outsourced Assembly & Test) – 4
• IP & EDA (Electronic Design Automation) – 18
• Research & Development – 4
• University R & D Partner - 104

Activities

• Fabless – 1
• IDM – 11
• Materials – 3
• Chip Design – 150
• Manufacturing – 196
• Research & Development – 183

Most important to the current administration seems to be the production of advanced semiconductors in the US by US companies.  According to the dataset, there are 10 entries under the Business Type “Foundry” that are designated as having the “Activity” of IDM, manufacturing, or chip design, the closest we can come to what would be considered production fabs.  Additionally, we have added those listed as foundries but have manufacturing or chip design as their activity.  For more clarity, we have added data about the type of semiconductors produced, the node, and capacity (WPM) whenever available:

Intel is the only US company that produces advanced semiconductors in the US (10nm or less), and while the current goal is to spur semiconductor production in the US, the CHIPS program has done an impressive job in bringing foreign semiconductor producers into the US.  Below is a list of those fabs currently under construction in the US.  Notably, all are US companies other than the Samsung (005930.KS) Taylor fab, but only the Samsung fab will produce logic. 

We pull out from the list those companies listed as Business Type – Equipment and Activity as Manufacturing, almost all of which are US based companies:

​So while the US does not have much of a local company advanced logic production force, it does have a dominant semiconductor equipment manufacturing and design ecosystem, particularly for advanced products.  Unfortunately tariffs and export restrictions limit the growth of this business, which gets little government support.  Encouraging local EDA company growth might be a more feasible path for government sponsored subsidy programs, allowing these companys to push the limits of advanced logic and packaging that will allow US foundries, whether owned by US companies or by others, to flourish.  Rather than forcing the expansion of US advanced semicomductor manufacturing, a process that will take many years, as long as advanced chips are being produced onshore, less attention should be paid to who is producing them and more toward what they are producing.  If our chip design solutions advance more quickly than others, the US semiconductor business will have a distinct advantage over other countries.